Cable connections between the boards:
1. One two-way optical fiber between DDU and DAQMB;
2. One 50-pin round shielded cable for control signals
and one 14-pin skew clear cable for channel link between each CFEB and
DAQMB;
3. Three 26-pin flat cables, one for fake ALCT
data, one for fake CLCT data, one for fake TMB data, and one 20-pin flat
cable for fake CCB data between DAQMB and FTC;
4. One 25-pin flat cable between computer parallel port
and JTAG driver, and one 14-pin flat cable for LVDS JTAG signal between
JTAG driver and DAQMB;
5. Six 34-pin cables between each CFEB and the chamber;
6. One BNC cable (TTL level) for LCT, and one BNC cable
(TTL level) for L1ACC to FTC, if the signals are available;
7.1. If CCB is available, connect the 20-pin flat cable
between DAQMB and CCB, instead of FTC;
7.2. If CLCT is available, connect the 26-pin flat cable
between DAQMB and CLCT, instead of FTC, and connect one 26-pin skew clear
cable between CFEB and CLCT.
7.3. If ALCT is available, connect the 26-pin flat cable
between DAQMB and ALCT, instead of FTC;
7.4. If TMB is available, connect the 26-pin flat cable
between DAQMB and TMB, instead of FTC.
Jumpers and Switches on the boards:
DDU: Set switch on the front panel to 'FIBER';
DAQMB: Set J5, J6, J7 to match the available CFEBs;
FTC: set S1, S2 switch according to LCT and L1ACC signal
source;
Set all other switches and jumpers on the boards to default
position.
For a more detailed cable connections, switches and jumper setting, refer to CFEB setting, DAQMB setting and FTC setting respectively.
Software setting:
Modify the configure files at ~fast/data/daqmb_config/daqmb_config_000X
to match the hardware, available CFEBs, FPGA programming files, and programmable
delay setting etc.
On power-up:
manually reset the FTC FPGA, and run the 'FULL SETUP'
in CFEB_CONTROL to load DAQMB, CFEB FPGA program files and other settings.
If the DAQMB is powered off, set DDU switch to LOOPEN to avoid overheat
of GLINK chips.
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