An Introduction to the CMS EMU DDU

Device Dependent Unit (DDU) is the interface point between the on detector components and the Event Builder (EB) acquisition system.

As such, our goal is that the DDU will contain a minimal amount of "intelligence" (preferably none), providing a transparent link between the EMU Motherboard (MB) and the DDU Driver software.

The DDU interfaces the MB via a high speed optical link (1.2 Gbaud = 1.5 GHz).  That is 150MB/s or 75 MWORD/s

The DDU interfaces the EB via a local PCI bus on each front end (DDU carrier) unit (FEU). As such, we have confined ourselves to a 32-bit (DWORD) data width and a 33 MHz DWORD rate, shared among multiple DDUs. That is 132 MB/s or 66 MWORD/s.

Although 66-MHz and/or 64-bit PCI are options, we are not considering them at this time due to a lack of available PCI interface drivers compatible with the DDU goals.

Limitations from the DDU:

1. Given the 32-bit width of the PCI bus, it is proposed that data should be organized in 16-bit WORDs, which are grouped into 32-bit words before transfer via PCI.
2. Because of the unpredictable nature of the data stream, no sufficiently unique marker word(s) can be found to clearly delimit "beginning," "end," "error," or other control type words. We propose that one of the 16 bits be reserved distinguishing control words from 15-bit data words.
• 15-bits is consistent with the 12+1 Cathode digitized data
• The Anode data, whose natural size is 96-bits, is not conveniently broken into 15-bit pieces (without a residual partial word to be dealt with).
3. Our current cascaded FIFO scheme on the DDU actually allows slightly more than half the PCI bandwidth per DDU, after bursting full speed for about 10 DWORDS.
• Seemingly a grievous error!
• This "flaw" is acceptable considering that the final system will actually have multiple DDU boards on each local PCI bus.
• In a dual DDU FEU, at best each DDU would only get half the bandwidth on average, anyhow.
• Why over engineer (extra $) if on average nothing is gained?

From the Anode Point of view:

• For a 15-bit scheme, 7 WORDs would be required, the last word only partially used.
• Alternatively, a 12-bit scheme would require 8 WORDs, but would also leave room for serial information as done in the Cathode stream.

Conclusion: