Channel Link Bit Assignment
| Description |
# Bits |
Comments |
| (bits for LCT data handling): |
|
|
| LCT or FIFO Data |
8 |
Anode/Cathode LCT and Raw Hit data. |
| LCT Header word flag |
1 |
Header words, not front-end bits. High true. |
| DDU Special word flag |
1
|
Indicates a word that effects "Event Builder" processing. |
| L1A * LCT Match |
1
|
Indicates LCT and Raw Hit data will be written. |
| Abort Data Transmit flag |
1
|
Marks an interupted event. Accompanied by Last word and DDU flags.
High true. |
| Event Type |
2
|
0=Normal, 1=Diagnostic, 2=Synchronization. High true. May be sent by Rice... |
| (bits for FIFO control): |
|
|
| DAQMB FIFO Write Enable |
1 |
Needs no explanation. Low true. |
| First word flag |
1
|
Marks first word for this event from LCT cards. High true. |
| Last word flag |
1 |
Marks last word for this event from LCT cards. High true. |
| (bits for cathode SCA readout): |
|
|
| LCT flag |
1 |
At least one FEB has an LCT. High true. |
| FEB Boards with LCT |
7 |
Flags set for all FEBs with an LCT. High true. |
| Total |
25 |
A single Channel Link can carry 28 bits. |