The system includes:

             1 DDU (Device Dependent Unit)

             1 DAQMB (DAQ Mother Board)

             1-5 CFEB (Cathode Front-End Board)

             1  FTC (Fake Trigger Card)

             1 JTAG driver

The following connection instructions applies to DAQMB pcb version 2,

and CFEB pcb version 2.

Cable connections between the boards:

• One two-way optical fiber between  DDU and DAQMB;
• Each CFEB and DAQMB;
• Three  26-pin flat cables, one for fake ALCT data, one for fake CLCT data, one for fake TMB data, and one 20-pin flat cable for fake CCB data between DAQMB and FTC;
• One 25-pin flat cable between computer parallel port and JTAG driver, and one 14-pin flat cable for LVDS JTAG signal between JTAG driver and DAQMB;
•  Six 34-pin cables between each CFEB and the chamber;
• One BNC cable (TTL level) for LCT, and one BNC cable (TTL level) for L1ACC to FTC, if the signals are available;
• DAQMB rear connections
• If CCB is available, connect the 20-pin flat cable between DAQMB and CCB, instead of FTC;
• If CLCT is available, connect the 26-pin flat cable between DAQMB and CLCT, instead of FTC, and connect one 26-pin skew clear cable between CFEB and CLCT.
• If ALCT is available, connect the 26-pin flat cable between DAQMB and ALCT, instead of FTC;
• If TMB is available, connect the 26-pin flat cable between DAQMB and TMB, instead of FTC.

• DDU: Set switch on the front panel to 'FIBER';
• DAQMB: Set J5, J6, J7 to match the available CFEBs;   see  DAQMB setting
• FTC: set S1, S2 switch according to LCT and L1ACC signal source;  see  FTC setting
• For CFEB jumper settings see   CFEB setting
• Set all other switches and jumpers on the boards to default position.

On power-up:

Bring power up in the following order:
1) CFEB's
2) FTC
3) DAQMB
Manually reset the FTC FPGA, and run the 'FULL SETUP' in CFEB_CONTROL to load DAQMB, CFEB FPGA program files and other settings.

To test if JTAG is talking to CFEB's do the following:
From CFEB_CONTROL program select TEST/DEBUG menu and run SHIFT TEST
The result read back should be BADFEED5DEAD

To check the FPGA's for proper state do the following:
From CFEB_CONTROL program select STATUS/TEMP menu and run STATUS
The results should look like:
  Trigger and Calib Control Status
----------------------------------------
FIFO Empty bits     8..1     :  11111111 or 00111111  depending on ALCT/CLCT connections
FIFO Full bits      8..1     :  00000000 or 11000000
Channel Links Enab/Disab     :  11111
LCT FIFO Empty               :  1
LCT FIFO Error               :  0
L1Acc FIFO Empty             :  1
L1Acc FIFO Error             :  0
JTAG FIFO-Load-Clock Enable  :  1
Trigger Error                :  0
Header Output Enable         :  0
Artificial Pulse Mode        :  0
Calibration Mode             :  0

   Front End Board Status
-----------------------------------------------------------------------------
Boards in use                :  1  :  2  :  3  :  4  :  5
# Words in LCT FIFO          : 00  : 00  : 00  : 00  : 00
LCT FIFO Empty               :  1  :  1  :  1  :  1  :  1
LCT FIFO full                :  0  :  0  :  0  :  0  :  0
# Words in L1Acc FIFO        : 00  : 00  : 00  : 00  : 00
L1Acc FIFO Empty             :  0  :  0  :  0  :  0  :  0
L1Acc FIFO Full              :  0  :  0  :  0  :  0  :  0
Pop FIFO1                    :  0  :  0  :  0  :  0  :  0
Push to CPLD                 :  1  :  1  :  1  :  1  :  1
SCA Overwrite                :  0  :  0  :  0  :  0  :  0
Busy (taking data)           :  0  :  0  :  0  :  0  :  0

If the results do not look like the above table the issue a Global Reset (CONFIG/RESETS/GLOBAL RESET)
If the problem persists try recycling the power but bring the power back on in the order specified above.

To verify the DDU link is working you can run CALIB/PEDISTAL/COLLECT 100.
If it says no data from DDU, check fiber optic connections, check that LOOPEN is not enabled on the back of the DDU, check STATUS (see above), redo Full Setup, and try again.
If you get screen fulls of "data is corrupt", check for unwanted triggers being sent to the DAQMB. For these test to be successful there must be no LCT's or LVL1's being passed to the DAQMB.

If all else fails, call an expert.

Note: If the DAQMB is powered off, set DDU switch to LOOPEN to avoid overheat of GLINK chips.

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