SWITCHED CAPACITOR ARRAY ASIC

GENERAL DESCRIPTION

The SCA4 is a mixed analog and digital device. It provides analog voltage storage in 1536 cells with random write and read. The memory array is organized as 16 channels of 96 storage capacitors.

The storage capacitors are accessed by separate write and read addresses. This allows simultaneous write and read to different capacitors. Note that the same capacitor can not be written and read at the same time. Write and read addressing can be random. However the addresses are arranged by grey code to minimize noise during sequential accesses.

The capacitors are written directly, 16 at a time, and read out through buffer amplifiers 16 at a time. Each channel has its own input pin so that 1 capacitor in each channel is written simultaneously at each write address. When a capacitor is addressed for writing, it is connected directly to the input pins through transmission gates without any buffering. That requires a low impedance source for writing at the maximum speed.

One capacitor in each channel is read out simultaneously at each read address. However, the channel output amplifiers are multiplexed to a single output pin. The output can be disabled to a high impedance so that multiple SCA chip outputs can be connected to a common analog bus.

All digital address and clock inputs are LVDS compatible.

All digital inputs have static protection circuitry. However this device can still be damaged by static discharge and should only be handled with appropriate static control procedures.