The anode LCT trigger processor finds track ``roads" through the 6 anode layers just as the cathode LCT trigger circuitry does. There are, however, several differences. The anode segmentation is much coarser and the roads are straight lines to the interaction region, independent of Pt. The roads also may differ in different chips and boards due to the changing polar angle. More importantly, though, the anode timing is preferred over the cathode timing to identify the correct bunch crossing. This is because the analog circuitry on the anodes is optimized for timing rather than pulse height measurement.
The operation of the anode LCT processor is shown below.
First, the
discriminator outputs are latched at the bunch crossing frequency. Whereas the
maximum drift time is as large as 50-60ns, tests using beam muons (ref 5) have
shown that the earliest signals out of the six layers arrive with about 97%
probability within the 25ns bunch crossing interval. If the background neutron
hit rate is high, it will be safer to use the timing of the second earliest
hit in preference to the very earliest. Therefore, a pretrigger finds a
coincidence of hits on two or more layers within a single bunch crossing in
order to establish the proper bunch crossing. In order to establish optimal
timing, the phase of the latch clock relative to the actual bunch crossing
time is controlled by the motherboard and is adjustable to 2ns accuracy. The
anode LCT pretrigger/con troller functions can be implemented in one or two
ASICs, but must maintain limited programmability to allow for flexibility in
the bunch ID algorithm. Discriminator outputs are also latched for a longer time interval and presented to pattern look-up tables, which find roads with up to six hits. Pattern look-up circuitry for the anode LCT is similar to that for the cathodeProcesso LCT, i.e. patterns of hits are input and pattern ID numbers for all found patterns are output. The set of patterns allows for missing hits, i.e. 4 out of 6 layers or 5 out of 6 layers, in addition to 6 out of 6 layers. The look-up tables are programmable in order to handle the various types of chambers and to maintain flexibility of triggering. While the pattern look-up could in principle be implemented as AND gates in an FPGA, at present a more cost-effective solution is an array of sixteen 32kByte static RAM chips.
Since the anode pattern look-up circuitry can find more than one valid pattern within a given set of input bits, addition al circuitry is included to select the best LCT. This is done by priority encoding: for each LCT pattern, there is a unique associated 7-bit pattern ID. The pattern ID is assigned according to the desirability of the pattern. If an LCT pattern is found, then a bunch crossing ID from the pretrigger requirement is assigned and anode LCT data is sent onto cables to the motherboards. The anode LCT output data includes the best pattern ID number and the wire number, as well the bunch crossing number. The pattern ID represents full knowledge of the strip pattern found, and can be used as input to a lookup table to find the number of hits and the best estimates of position and angle. The bunch crossing number gives a cross-check on the system timing. The LCT selector and output formatting can be implemented in ASICs with limited or no programmability, due to their fixed functionality.
Provision is also included in the anode LCT processor for downloading the pattern lookup tables, and for readout of the raw bit patterns from the discriminators.