Muon Cathode Strip Chambers
This is the most likely detector partitions and data
rates ( ME1/1 - ME4/1 ). For detail information, see the details below.
Total # of Anode channels :
Total # of Cathode channels :
Total # of AFEB :
11448 (16 channels)
Total # of CFEB:
2412 (96 channels)
Total # of DAQMB or CLCT/TMB or ALCT :
Total # of Chambers :
Average LCT rate per chamber :
Average L1A and LCT rate per chamber :
Data size at DAQMB with one LCT:
Average Data rate per chamber or DAQMB:
Average Data rate per DDU (one DAQMB per DDU) : ~ 1.03
( 9 DAQMB pre DDU): ~ 9.3 MB/s
Total Data rate
: 1032 kB/s x 468 = 483 MB/s
Average muon event size for each L1A trigger : 483
MB/s / 100kHz (L1A) = 4.8 kBytes
At DDU level, the event size for each L1A trigger is
4.8kBytes / number of DDU = 9 Bytes (for DAQMB
= DDU) or 80 Bytes (DAQMB = 9 x DDU)
Above numbers vary depending on ME sections.
For example, ME4/1 has 112kHz LCT rate which is 5 times higher than the
So, the Maximum conservative data rate can be drived from the highest
LCT rate chamber and MC uncertainty.
Detail CSC Data Rate Calculations
To estimate the deadtime and digitized data rate for cathode
DAQ, an estimate of the LCT rate in a chamber is needed. The LCT rate is
dominated by background charged particle flux. A Monte Carlo calculation
(CMS TN/96-070) using 2000 minimum biased background events generated by
CMSIM and the baseline LCT algorithm gives the following average LCT rates
at LHC designed luminosity (10**34/cm^2/s) in each of the different chamber
types. The calculated rates are probably accurate to within factor of 2
| Chamber Type
||LCT Rate (kHz)/chamber
|| # Chambers
|| # CFEB/chamber
|| # AFEB/chamber
CFEB has 96 channels and AFEB has 16 channels.
Chamber counts are a combination of both symmertic endcaps.
The ME 1/1 chambers have divided cathode strips, 64 strips on top, 48 stips
on bottom; ignoring the Lorentz tilt of the ME 1/1 anode wires, the chamber
is effectively two logically distinct pieces, each with a DAQMB.
The ME 4 chambers are not part of the current baseline design. But,
ME4/1 is most likely to be built.
It must be noted that the highest rate occurs in ME4/2, a result of insuficient
shielding againt back-scattered particles with the shielding model used.
If ME 4 is used, the real system would involve better shielding.
A conservative estimate of the LCT rate, we use 300 kHz per chamber independent
of chamber types. The LCT rate in a chamber section covered by 1 FEB is,
conservatively, 300kHz/(5 FEB's) = 60 KHz. The rate of (Lev-1)(LCT) coincidence
is 100kHz x 300kHz x 100ns = 3 kHz per chamber or 0.6kHz in a chamber section
covered by 1 FEB.
However, this rate is MUCH MUCH higher than what expected from
MCs as shown below.
Three options are considered here: the baseline (no ME 4);
baseline plus ME 4/1 only; and baseline plus both ME 4/1 and 4/2, without
any additional shielding. Reality is expected to
lie somewhere around the baseline + ME 4/1 option.
||+ ME 4/1
||+ ME 4/2
|# DAQ MB
|# FE Chips (A+C)
|# Channels (A+C)-(a
|Av. LCT Rate/chamber
||0.226 kHz (e)
||(426 + 400) kB/s
||(632 + 400) kB/s
||(1537 +400) kB/s
|Total Data Rate
|DDU Rate (1 Chamber/DDU) (f)
|DDU Rate (9 Chamber/DDU )
a) # FE Chips X 16 = # Channles
b) Integrated rate is from the TOP table using each ME section LCT rates.
c) L1A Rate (100kHz) X LCT Rate X 100ns (worst case time slop. 75ns might
be better. +-1 CMS clock)
d) 2.8 kBytes assumed for one LCT. (ex:
0.152 kHz x 2.8kB = 426 kB/s )
Also, you need to account
NO LCT rate,(ex: ~100kHz x 4Bytes = 400 kB/s )
For more detail, see below and refer to
DDU input format and
DDU output format
Data size at DAQMB ( WORD unit is used since 16bit FIFO all over the place
* Depends on how many ALCT channels are on a chamber
|| LCT x L1Acc (words)
||no LCT x L1Acc(words)
||10 (Head) + 360 *
||10(Head) + 210 **
||( 96 + 2(check)) x 8 = 784
|Total with 1 LCT
||1382 (2.8 kBytes)
||2 (4 Bytes)
|Total with 1 LCT w/o CLCT 99
||1162 (2.3 kBytes)
||2 (4 Bytes)
( 36(#AFEB/chamber)X16 (channels) X 5(time
bins) / 8 = 360 bytes )
** 48 bits/CFEB X 5 (CFEBs) X 7(time bins) / 8 = 210 bytes
--- ALCT, CLCT sends 8 bit wide data to DAQMB 16bit wide FIFO due to
the constraint on DDU bit and Glink (16bit)
a lot of empty bits are going to. This is not included in the number at
--- At present, CLCT read out all boards. In future, it can do
only for CFEB with LCT or No Data for CLCT.
( CFEB data is better than
CLCT data which is good for trigger checking or other system check )
e) Average L1A+LCT Rate per chamber is 0.152 kHz which means only
0.15% (=0.152 / L1A rate)of chambers has LCT.
0.15% of 468 chambers is 0.7 chamber
has a LCT for each L1A. Ofcourse, this highly depends on which section
f) 1 Chamber ~ 1 DAQMB which is valid for except ME1/1
Given the uncertainty of the rate Monte Carlo, a
conservative estimate would include an additional factor of about 5. That
is, one should allow for 482 MB/s X 5 = 2.4 GB/s into the
The final number of device dependent units, as well as the number of FED
blocks which are necessary is still up in the air. This number depends
on FED bus speed and width, and estimations of the ability to balance the
bandwidth requirements based on detector geometry.
A rough estimate can be made nonetheless.
Present S-link : 32bit 40MHz ===> 160 MB/s
====> Already can handle 9 chambers/DDU rate,
9.3 MB/s x (10 conservative factor )
=====> More Chambers per DDU ???????????
Maximum S-link : 64bit 100Mhz ===> 800 MB/s
Guide line from RUWG : Event size at DDU level
~ 2kB or 200 MB/s at 100kHz
*******EMU is much small than this guide line even
9 DAQMB connected to a DDU. *************
Updated Oct/15/2000 Chang Lyong Kim firstname.lastname@example.org
Updated June/29/99 Paul Nylander