Muon Cathode Strip Chambers

This is the most likely  detector partitions and data rates ( ME1/1 - ME4/1 ). For detail information, see the details below.

Detectors

Data Rates

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Above numbers vary depending on ME sections. 
For example, ME4/1 has 112kHz LCT rate which is 5 times higher than the average. 
So, the Maximum conservative data rate can be drived from the highest LCT rate chamber and MC uncertainty.

 

 
 
 
 
 


Detail CSC Data Rate Calculations

Chamber Rates

To estimate the deadtime and digitized data rate for cathode DAQ, an estimate of the LCT rate in a chamber is needed. The LCT rate is dominated by background charged particle flux. A Monte Carlo calculation (CMS TN/96-070) using 2000 minimum biased background events generated by CMSIM and the baseline LCT algorithm gives the following average LCT rates at LHC designed luminosity (10**34/cm^2/s) in each of the different chamber types. The calculated rates are probably accurate to within factor of 2 - 5.
 Chamber Type LCT Rate (kHz)/chamber  # Chambers  # CFEB/chamber  # AFEB/chamber
 ME 1/1 30 72 7 18
ME 1/2 7 72 5 24
ME 1/3 < 1 72 4 12
ME 2/1 32 36 5 42
ME 2/2 12 72 5 24
ME 3/1 36 36 5 36
ME 3/2 7 72 5 24
ME 4/1 112 36 5 36
ME 4/2 265 72 5 24

Data Volume

Three options are considered here: the baseline (no ME 4);  baseline plus ME 4/1 only; and baseline plus both ME 4/1 and 4/2, without any additional shielding. Reality is expected to lie somewhere around the baseline + ME 4/1 option.
  Baseline  + ME 4/1 + ME 4/2
# Chambers 432 468 540
# DAQ MB 504 540 612
# CFEB 2232 2412 2772
# AFEB 10152 11448 13176
# FE Chips (A+C) 10152+13392 11448+14472 13176+16632
# Channels (A+C)-(a 376,704 414,720 476,928
Integrated LCT Rate-(b 6552 kHz 10584 kHz 29664 kHz
Av. LCT Rate/chamber 15.2 kHz 22.62 kHz 54.9 kHz
Av. L1A+LCT Rate/chamber-(c 0.152 kHz 0.226 kHz  (e) 0.549 kHz
Av. Chamber Data Rate-(d (426 + 400) kB/s (632 + 400) kB/s (1537 +400) kB/s
  826 kB/s 1032 kB/s 1937 kB/s
Total Data Rate 360 MB/s 483 MB/s 1.05 GB/s
DDU Rate (1 Chamber/DDU) (f) 826 kB/s 1.03 MB/s 1.94 MB/s
DDU Rate (9 Chamber/DDU )  7.4 MB/s  9.3 MB/s 17.5 MB/s

DDU Distribution

The final number of device dependent units, as well as the number of FED blocks which are necessary is still up in the air. This number depends on FED bus speed and width, and estimations of the ability to balance the bandwidth requirements based on detector geometry.

A rough estimate can be made nonetheless.

Present S-link :  32bit 40MHz ===>   160 MB/s                   ====> Already can handle  9 chambers/DDU rate,
                                                                                                                         9.3 MB/s x (10 conservative factor )
                                                                                                   =====>  More Chambers per DDU  ???????????

Maximum S-link : 64bit 100Mhz ===>  800 MB/s
 

Guide line from RUWG : Event size at DDU level  ~ 2kB   or   200 MB/s    at  100kHz trigger rate

*******EMU is much small than this guide line even 9 DAQMB connected to a DDU. *************


Updated Oct/15/2000  Chang Lyong  Kim   clkim@mps.ohio-state.edu
Updated June/29/99  Paul Nylander