DMB_V6_7FF Project Status (10/26/2012 - 17:07:32)
Project File: DMB_OSU_V3_fifo_B904.xise Parser Errors: No Errors
Module Name: DMB_V6_7FF Implementation State: Programming File Generated
Target Device: xc6vlx130t-3ff1156
  • Errors:
No Errors
Product Version:ISE 12.4
  • Warnings:
1330 Warnings (30 new)
Design Goal: Balanced
  • Routing Results:
All Signals Completely Routed
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
All Constraints Met
Environment: System Settings
  • Final Timing Score:
0  (Timing Report)
 
Device Utilization Summary [-]
Slice Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Registers 4,340 160,000 2%  
    Number used as Flip Flops 4,305      
    Number used as Latches 35      
    Number used as Latch-thrus 0      
    Number used as AND/OR logics 0      
Number of Slice LUTs 3,477 80,000 4%  
    Number used as logic 2,148 80,000 2%  
        Number using O6 output only 1,237      
        Number using O5 output only 405      
        Number using O5 and O6 506      
        Number used as ROM 0      
    Number used as Memory 1,052 27,840 3%  
        Number used as Dual Port RAM 0      
        Number used as Single Port RAM 0      
        Number used as Shift Register 1,052      
            Number using O6 output only 818      
            Number using O5 output only 6      
            Number using O5 and O6 228      
    Number used exclusively as route-thrus 277      
        Number with same-slice register load 213      
        Number with same-slice carry load 64      
        Number with other load 0      
Number of occupied Slices 1,846 20,000 9%  
Number of LUT Flip Flop pairs used 4,954      
    Number with an unused Flip Flop 1,234 4,954 24%  
    Number with an unused LUT 1,477 4,954 29%  
    Number of fully used LUT-FF pairs 2,243 4,954 45%  
    Number of unique control sets 444      
    Number of slice register sites lost
        to control set restrictions
2,020 160,000 1%  
Number of bonded IOBs 390 600 65%  
    Number of LOCed IOBs 386 390 98%  
    IOB Flip Flops 17      
    IOB Master Pads 38      
    IOB Slave Pads 38      
    Number of bonded IPADs 16      
Number of RAMB36E1/FIFO36E1s 130 264 49%  
    Number using RAMB36E1 only 116      
    Number using FIFO36E1 only 14      
Number of RAMB18E1/FIFO18E1s 4 528 1%  
    Number using RAMB18E1 only 4      
    Number using FIFO18E1 only 0      
Number of BUFG/BUFGCTRLs 11 32 34%  
    Number used as BUFGs 10      
    Number used as BUFGCTRLs 1      
Number of ILOGICE1/ISERDESE1s 0 600 0%  
Number of OLOGICE1/OSERDESE1s 17 600 2%  
    Number used as OLOGICE1s 17      
    Number used as OSERDESE1s 0      
Number of BSCANs 1 4 25%  
Number of BUFHCEs 0 120 0%  
Number of BUFOs 0 30 0%  
Number of BUFIODQSs 0 60 0%  
Number of BUFRs 1 30 3%  
Number of CAPTUREs 0 1 0%  
Number of DSP48E1s 0 480 0%  
Number of EFUSE_USRs 0 1 0%  
Number of FRAME_ECCs 0 1 0%  
Number of GTXE1s 7 20 35%  
Number of IBUFDS_GTXE1s 1 10 10%  
Number of ICAPs 0 2 0%  
Number of IDELAYCTRLs 0 15 0%  
Number of IODELAYE1s 0 600 0%  
Number of MMCM_ADVs 1 10 10%  
Number of PCIE_2_0s 0 2 0%  
Number of STARTUPs 1 1 100%  
Number of SYSMONs 0 1 0%  
Number of TEMAC_SINGLEs 0 4 0%  
Number of RPM macros 83      
Average Fanout of Non-Clock Nets 3.51      
 
Performance Summary [-]
Final Timing Score: 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: All Constraints Met    
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentFri Oct 26 16:46:06 20120798 Warnings (0 new)467 Infos (232 new)
Translation ReportCurrentFri Oct 26 16:59:21 2012029 Warnings (28 new)2 Infos (0 new)
Map ReportCurrentFri Oct 26 17:02:00 20120233 Warnings (2 new)11 Infos (0 new)
Place and Route ReportCurrentFri Oct 26 17:04:00 20120124 Warnings (0 new)2 Infos (0 new)
Power Report     
Post-PAR Static Timing ReportCurrentFri Oct 26 17:04:37 2012003 Infos (0 new)
Bitgen ReportCurrentFri Oct 26 17:07:31 20120146 Warnings (0 new)1 Info (0 new)
 
Secondary Reports [-]
Report NameStatusGenerated
ISIM Simulator LogOut of DateTue Oct 2 15:36:46 2012
WebTalk Log FileCurrentFri Oct 26 17:07:31 2012

Date Generated: 10/26/2012 - 17:07:32