CSC DCC Output Data Format
Data Format: (Same for
Slink and Gigabit Ethernet)
The DCC data are aligned in
64-bit
words. Each event is one SLINK package, but maybe several Gigabit
Ethernet
packages. The Data include: two SLINK header words, DDU data
load, FakeDDU data load, and two SLINK trailer words. For Sept/Oct.
beam test, there will be only DDU data load for normal data
taking. There will be FakeDDU data load for DCC test.
Here is an sample event:
1 5f00 0065 30fc
aebf
DCC-Slink Header 1 ---- Slink64 header format --
2 d900 0000 00e0 8597
DCC-Slink
Header
2
3 5000 0065 0f40
0000
DDU1 Header 1 ----------------
4 8000 0001 8000
8000
DDU1 Header
2
| Refer
5 1010 0000 0201
0002
DDU1 Header
3
| to
6 9308 93e4 9000
9065
DMB1 header 1 ------ | DDU
7 a365 a008 aff3
a004
DMB1 Header 2 | Refer | for
8 423e 4228 4242
422f
DMB Data Load | to | Data
9 4236 422e 4259
42da
: :
DMB
| Format
10 4251 42cd 4247
4236
: :
Data
|
11 4243 422b 4236
422e
: : Format |
12 4235 4239 424d
42bd
:
:
:
13 424f 42d3 4248
4230
:
:
:
: : :
:
:
:
:
:
31 4252 42d5 4246
4232
:
:
:
32 7fff 7802 700a
1a71
:
:
:
33 4241 422a 4244
4234
:
:
:
: : :
:
:
:
:
:
201 4241 4229 4237
4233
:
:
:
202 423c 422f 425c
42d5
:
:
:
203 4251 42d0 4249
4231
: :
Refer
:
204 4246 422d 4238
4232
: :
to
:
205 423d 4234 4252
42d3
: |
DMB
:
206 424f 42d6 4245
4232
DMB Data Load | for :
207 7fff 7000 780c
66ac
DMB Data Load | Data :
208 fff3 f018 f07f
f3e4
DMB1 trailer 1 | format
:
209 e000 e000 e000
efff
DMB1 trailer 2 ----- :
210 9308 93e4 9000
9065
DMB2 Header 1 ----- :
211 a365 a008 aff3
a004
DMB2 Header 2 | Refer :
212 423e 4228 4242
422f
DMB Data Load | to DMB :
213 4236 422e 4259
42da
: |
for
:
214 4251 42cd 4247
4236
: :
Data
:
215 4243 422b 4236
422e
: : Format :
216 4235 4239 424d
42bd
:
:
:
: : :
:
:
:
:
:
406 423c 422f 425c
42d5
:
:
:
407 4251 42d0 4249
4231
:
:
:
408 4246 422d 4238
4232
:
|
|
409 423d 4234 4252
42d3
: |
Refer
| Refer
410 424f 42d6 4245
4232
: | to
DMB
| to DDU
411 7fff 7000 780c
66ac
DMB Data Load | for | for
412 fff3 f018 f07f
f3e4
DMB2 Trailer 1 | data | Data
413 e000 e000 e000
efff
DMB2 trailer 2 ----- format | Format
414 8000 ffff 8000 8000
DDU1
trailer
1
|
415 1010 0000 0201 0002
DDU1
Trailer
2
|
416 a000 019e 0000 0000
DDU1
trailer 3 -----------------
417 d865 d10c d865 d10c
Start
of FakeDDU Data ----------
418 9065 9000 9065
9000
DMB3 header1
------
| Just
419 93e4 9308 93e4
9308
DMB3 header1 | Refer |
to
fake
420 a004 aff3 a004
aff3
DMB3 header2 | to DMB | DDU
421 a008 a365 a008
a365
DMB3 header2 |
for
| input
422 422f 4242 422f
4242 DMB
Data Load | data | to test
423 4228 423e 4228
423e DMB
Data Load | format | DCC
424 42da 4259 42da
4259
: |
The
|
425 422e 4236 422e
4236
: : 3rd,4th
|
It can
426 4236 4247 4236
4247
: :
words
| supply
427 42cd 4251 42cd
4251
: :
repeat
| redundant
428 422e 4236 422e
4236
: : 1st,2nd
:
check
429 422b 4243 422b
4243
: :
words
: on DMB
430 42bd 424d 42bd
424d
:
:
: Data
431 4239 4235 4239
4235
:
:
:
: : :
:
:
:
:
:
813 42d0 4251 42d0
4251
:
:
:
814 4232 4238 4232
4238
:
:
:
815 422d 4246 422d
4246
: :
Refer
: FakeDDU
816 42d3 4252 42d3
4252
: : to
DMB
: Data to
817 4234 423d 4234
423d
: :
for
: test
818 4232 4245 4232
4245
: |
Data
| DCC
819 42d6 424f 42d6
424f
: |
Format
|
820 66ac 780c 66ac
780c DMB
Data Load
|
|
821 7000 7fff 7000
7fff DMB
Data Load | 3rd,4th |
822 f3e4 f07f f3e4
f07f
DMB3 trailer1 | words |
823 f018 fff3 f018
fff3
DMB3 Trailer1 | repeat |
824 efff e000 efff
e000
DMB3 trailer2 | 1st,2nd |
825 e000 e000 e000
e000 DMB3 trailer2
------ words --|
826 efff 8000 0000 800b DCC-slink
trailer1
827 af00 033d a1e8 f197 DCC-slink
trailer2
--- SLINK64 trailer format
! For most of the Sept/Oct. Beam test, there will be only DDU data,
there will be no fake_DDU data. !
Here you can find
the
detailed discription of DCC-slink header1 and trailer 2 as defined by
CMS as common data format, Follow the link to "DAQ/FE INTERFACING
GUIDE", then link to "COMMON DATA FORMAT". If you need check the
CRC-16, contact Stan for the code. Or you can use SLINK receiver
hardware checking.
(Header 1: 5XYY,YYYY,ZZZW,WW5F
X: 1 for normal trigger, 2 for calibration
YYYYYY: 24-bit Event number counter (L1A number counter)
ZZZ: 12-bit beam crossing counter
WWW: 12-bit Slink ID
Trailer 2: AFXX,XXXX,YYYY,ZZW3
XXXXXX: 24-bit package (in 64-bit) word count
YYYY: 16-bit CRC (USB, including header and trailer)
ZZ: Event summary: L1A, DUMPDATA, SLINKSTOP, FIFO_IN_USE(5-1)
W: TTS status, 0 for not_implemented )
DCC-slink header 2: D9XX,XXXX,XXYY,YYZZ
XXXXXXXX: 32-bit orbit counter number
YYYY: FIFOs status: Slink_FIFO_Status[4:0],
IN_FIFO_PAEs[5:1], IN_FIFO_EMPTY[5:1], dummy bit
ZZ: Bits 7,6,5,4,2 to indicate available DDU. For slink0, the DDU slots are 5, 12, 4, 13, 3 (same as Fifo_in_use[4:0]); for slink1, the DDU slots are 9, 7, 10, 6, 11 (same as FIFO_in_use[9:5]). Bit3 is set to 0, as the last header word, bit 1 and bit 0 no use (current value 11)
DCC-Slink trailer 1: EFZZ,XXXX,XXXX,XXYY
XXXXXXXXXX: DDU data status, 8 bit each
YY: FIFO readout timeout status: TimeOut_Fifo[5:2], '1',
TimeOut_FIFO[1], Dummy[2:1]
ZZ: Time used to readout the current event. This is a
coded 8-bit timer. 'a b c d e f g h', readout time is:
(bcdefgh)*(16**a)*0.41us.
For
CFEB data format, refer to CFEB data format .
For
DAQMB data format, refer to DAQMB production data format .
For
DDU
data format, refer to DDU data format
Back to Gu work
page
Feb. 1, 2006: Add the Header 2 'ZZ' for available DDU